We use cookles to Improve your online experience. By continuing browsing this website, we assume you agree our use of cookies.
Home > Blog > PCB assembly technology > Bottom-Terminal Soldering in Low-Volume PCB Assembly: How to Avoid Voids
Bottom-Terminal Soldering in Low-Volume PCB Assembly: How to Avoid Voids
September 5th, 2025
313 views
Bottom-Terminal Soldering in Low-Volume PCB Assembly: How to Avoid Voids
In low volume PCB assembly (1–5000 units), bottom-terminal components—such as DFNs (Dual Flat No-Lead), QFNs (Quad Flat No-Lead), and bottom-terminated resistors/capacitors—are widely used for miniaturization and thermal efficiency. However, soldering these components (where terminals are located on the component’s bottom surface, not its edges) is highly prone to void formation: gas-filled cavities in the solder joint that reduce thermal conductivity, electrical performance, and mechanical reliability. Unlike high-volume production, where automated processes and extensive testing minimize voids, low volume PCB assembly faces unique challenges: frequent component changes (limiting process optimization), manual or semi-automated solder paste application (prone to inconsistency), and small batch sizes (reducing opportunities to refine reflow parameters). A 2024 industry study found that 58% of bottom-terminal soldering defects in low-volume runs are voids, leading to \(1,000–\)3,000 in rework costs per batch and 15–20% of field failures in critical applications like automotive sensors.
To avoid voids in bottom-terminal soldering for low volume PCB assembly, teams must address root causes (e.g., flux outgassing, inadequate solder wetting, stencil misdesign) with targeted, small-batch-friendly strategies. This article outlines 6 technical solutions validated by ShwayPCB’s Small-Batch PCBA Services (Low-Volume SMT Assembly), which has achieved a 97.6% void-free rate (per IPC-A-610 Class 2 standards) for low-volume bottom-terminal soldering across automotive, medical, and industrial sectors.
1. Core Causes of Voids in Low-Volume Bottom-Terminal Soldering
Voids in bottom-terminal soldering arise from a mix of material, process, and low-volume-specific factors—understanding these causes is critical to prevention:
- Flux Outgassing During Reflow: Bottom-terminal components have large solder pad areas (e.g., a 5mm×5mm QFN thermal pad) that trap flux beneath the component. In low-volume runs, if the reflow profile is too fast (to save time), flux vaporizes rapidly and cannot escape, forming bubbles that become voids.
- Inconsistent Solder Paste Volume: Manual or semi-automated paste application (common in low volume PCB assembly) often deposits uneven paste volumes on bottom-terminal pads. Too little paste leaves gaps (voids), while too much paste traps excess flux—both increase void risk.
- Stencil Aperture Misdesign: Generic stencils (not customized for bottom-terminal components) have oversized or undersized apertures. Oversized apertures deposit excess paste; undersized apertures cause insufficient wetting—both lead to voids.
- Component Pad Contamination: Low-volume PCBs are frequently handled manually (e.g., during kitting or prototype assembly), leading to oil, dust, or flux residue on bottom-terminal pads. Contaminants prevent proper solder wetting, creating gaps that form voids.
- Reflow Profile Instability: Frequent changeovers in low-volume assembly disrupt reflow parameter consistency. For example, a profile optimized for a small DFN may be reused for a large QFN, causing uneven heating and flux trapping.
2. Strategy 1: Select the Right Solder Paste for Bottom-Terminal Components
Solder paste properties directly impact void formation—low volume PCB assembly teams must choose formulations optimized for bottom-terminal soldering.
Technical Implementation:
- Flux Type and Activity Level:
Prioritize low-outgassing, high-activity flux to minimize gas generation and ensure complete wetting:
- Flux Outgassing: Select paste with a total outgassing rate <5% (per J-STD-004) at reflow temperatures (220–245°C). Low-outgassing flux reduces vapor formation beneath bottom-terminal pads.
- Flux Activity: Use "RMA" (Rosins with Mild Activators) or "No-Clean" flux with high activity (Class 3 per J-STD-004) to remove pad contaminants and improve wetting. Avoid "R" (Pure Rosin) flux—its low activity is insufficient for bottom-terminal pads, leading to poor wetting and voids.
- Solder Powder Size:
Match powder size to bottom-terminal pad size to ensure uniform paste deposition and flux escape:
|
Bottom-Terminal Component Type
|
Pad Size
|
Recommended Powder Size (IPC/JEDEC)
|
Rationale
|
|
Small DFN/QFN (≤3mm×3mm)
|
≤1mm×1mm
|
Type 5 (10–25μm)
|
Smaller powder fills narrow gaps between pads and components, reducing trapped gas.
|
|
Medium QFN (3mm×3mm–7mm×7mm)
|
1mm×1mm–3mm×3mm
|
Type 4 (20–38μm)
|
Balances paste flow and flux escape for moderate pad sizes.
|
|
Large QFN (≥7mm×7mm)
|
≥3mm×3mm
|
Type 3 (38–50μm)
|
Larger powder allows faster flux escape from large thermal pads, minimizing voids.
|
- Paste Storage and Handling:
Low-volume runs often use small paste quantities ( <50g per batch), making paste vulnerable to degradation:
- Storage: Keep paste at 2–10°C and thaw at room temperature for 4–8 hours (no microwave thawing)—rapid temperature changes cause moisture absorption, which increases outgassing and voids.
- Open Time: Limit paste exposure to air to <4 hours (vs. 8 hours for high-volume runs). For ultra-low batches (1–10 units), use syringe-dispensed paste to minimize air contact.
3. Strategy 2: Optimize Stencil Apertures for Bottom-Terminal Pads
Stencil aperture design is the most impactful factor in controlling solder paste volume and flux escape for bottom-terminal components—low volume PCB assembly teams must customize apertures for each component type.
Technical Implementation:
- Aperture Size and Shape for Standard Bottom-Terminal Pads:
Design apertures to balance paste volume and flux escape:
- Terminal Pads (Non-Thermal): For QFN edge terminals (e.g., 0.5mm×1.0mm), use apertures that are 80–85% of pad size (e.g., 0.4mm×0.85mm) with rounded corners. Rounded corners reduce paste bridging and allow flux to escape during reflow.
- Thermal Pads (Large Central Pads): For QFN thermal pads (e.g., 3mm×3mm), use "split apertures" (multiple small apertures instead of one large one) to facilitate flux escape:
- Split a 3mm×3mm thermal pad into 9×9 small apertures (0.3mm×0.3mm each) with 0.1mm gaps between them. Gaps act as channels for flux vapor, reducing voids by 40–50%.
- For even larger thermal pads (≥5mm×5mm), add 2–4 "vent holes" (0.1mm diameter) to the stencil aperture—these holes provide additional flux escape paths.
- Stencil Thickness Adjustment:
Match stencil thickness to component size and paste type to ensure optimal paste volume:
- Small Bottom-Terminal Components (≤3mm×3mm): Use 0.10–0.12mm thick stencils to avoid excess paste (which traps flux).
- Large Bottom-Terminal Components (≥7mm×7mm): Use 0.12–0.15mm thick stencils to ensure sufficient paste for thermal conductivity—thicker stencils deposit more paste, but split apertures prevent voids.
- Lead-Free Paste (SAC305): Increase thickness by 0.01–0.02mm (vs. leaded paste) to compensate for SAC305’s higher surface tension, which requires more paste to achieve full wetting.
ShwayPCB’s Small-Batch PCBA Services (Low-Volume SMT Assembly) uses laser-cut, component-specific stencils for all low-volume bottom-terminal runs—reducing stencil-related voids by 75%.
4. Strategy 3: Optimize Reflow Profiles for Flux Escape and Wetting
Reflow profile design is critical to managing flux outgassing—low volume PCB assembly teams must tailor profiles to bottom-terminal components’ thermal mass and flux characteristics.
Technical Implementation:
- Bottom-Terminal-Specific Reflow Profile:
Use a 4-stage profile that balances flux activation, outgassing, and solder wetting:
|
Profile Stage
|
Temperature Range
|
Time
|
Key Purpose for Void Prevention
|
|
Preheat
|
150–180°C
|
90–120 seconds
|
Gradually heat flux to activate it and evaporate solvents slowly—prevents rapid outgassing.
|
|
Soak
|
180–210°C
|
60–90 seconds
|
Complete flux activation, reduce paste viscosity, and allow flux vapor to escape through stencil gaps/split apertures.
|
|
Reflow
|
220–245°C (peak: 235–240°C for SAC305)
|
30–45 seconds (≥220°C: 60–75 seconds)
|
Melt solder fully, ensure complete wetting of bottom terminals, and allow remaining flux vapor to escape.
|
|
Cool-Down
|
217–150°C
|
60–90 seconds
|
Cool solder at 2–3°C/sec to prevent reflow and trap remaining vapor (which would form voids).
|
- Adjustments for Component Size:
Modify profiles based on bottom-terminal component thermal mass to ensure uniform heating:
- Small Components (≤3mm×3mm): Reduce peak temperature to 230–235°C and shorten soak time to 60 seconds—small components heat quickly, and excess heat increases flux outgassing.
- Large Components (≥7mm×7mm): Increase peak temperature to 240–245°C and extend soak time to 90 seconds—large thermal pads require more heat to melt solder fully and release trapped flux.
- Mixed Components: Use a "ramp-soak-reflow" profile with a gradual ramp rate (1–1.5°C/sec) to balance heating across small and large bottom-terminal components—avoids localized overheating or underheating.
- Profile Validation with Test PCBs:
For low-volume runs, validate profiles using 2–3 test PCBs (identical to production) before full assembly:
- After reflow, inspect bottom-terminal joints using X-ray (to detect hidden voids) or cross-sectional analysis (for critical runs).
- If voids exceed IPC limits (≤25% of joint area for Class 2), adjust the profile: extend soak time by 15 seconds (to improve flux escape) or reduce peak temperature by 5°C (to slow outgassing).
5. Strategy 4: Pre-Treat Components and PCBs to Ensure Proper Wetting
Poor pre-treatment of bottom-terminal components and PCBs is a major cause of voids in low volume PCB assembly—rigorous cleaning and preparation eliminate contaminants that prevent wetting.
Technical Implementation:
- PCB Pad Cleaning:
Remove contaminants from bottom-terminal pads to ensure solder adheres properly:
- Solvent Cleaning: Wipe pads with isopropyl alcohol (IPA) using lint-free wipes—focus on areas with visible flux residue (from previous SMT assembly) or oil (from manual handling). For stubborn residue, use a soft-bristle brush (0.5mm nylon) to scrub pad surfaces gently.
- Ultrasonic Cleaning: For PCBs with heavy contamination (e.g., after rework), use an ultrasonic cleaner (30–40 kHz) with aqueous cleaning solution (e.g., Zestron SC-100) at 50–60°C for 5–10 minutes. Rinse with deionized water and dry with compressed air (30 psi) to avoid water spots.
- Oxide Removal: For PCBs stored for >3 months, use a mild abrasive pad (e.g., 3M Scotch-Brite) to remove pad oxidation—oxidized pads repel solder, creating gaps that form voids.
- Component Terminal Preparation:
Address terminal issues that hinder wetting:
- Terminal Oxidation: Bottom-terminal components stored in humid environments ( >60% RH) develop oxide layers on terminals. Dip components in flux (or a mild acid solution like vinegar) for 10–15 seconds to remove oxides—rinse with water and dry before assembly.
- Terminal Flatness: Check bottom-terminal flatness using a digital micrometer (accuracy ±0.001mm). Components with >0.05mm terminal warpage (common in low-volume batches) trap air beneath the component, forming voids—reject or replace warped components.
- Component Placement Accuracy:
Ensure bottom-terminal components are placed flat and centered on pads to avoid air trapping:
- Placement Pressure: Use 5–10 grams of placement force (vs. 10–15 grams for edge-terminal components) to avoid component warping. For manual placement (common in ultra-low runs), use a vacuum pen with adjustable pressure.
- Alignment: Align component terminals to pads with ±0.02mm accuracy. For fine-pitch bottom-terminal components (e.g., 0.4mm pitch DFNs), use a digital microscope (50x magnification) to verify alignment before reflow.
6. Strategy 5: Inspect and Rework Voids in Low-Volume Bottom-Terminal Soldering
Even with prevention strategies, occasional voids may appear—low volume PCB assembly teams must detect and rework them to meet quality standards.
Technical Implementation:
- Void Detection Techniques:
Use these methods to identify voids in bottom-terminal joints:
- X-Ray Inspection: The most effective method for hidden voids (e.g., beneath QFN thermal pads). Use a benchtop X-ray system (e.g., Nikon Metrology XTH 225) with 50–100x magnification to measure void size and area.
- Acoustic Microscopy: For critical runs (e.g., medical devices), use acoustic microscopy to detect small voids ( <50μm) that X-ray may miss. Acoustic waves reflect differently off voids vs. solid solder, creating clear contrast in images.
- Visual Inspection: For surface voids (e.g., on edge terminals), use a digital microscope (100x magnification) to check for visible gaps or bubbles in the solder joint.
- Void Rework Process:
Rework voids without damaging components or PCBs:
- Heat the Joint: Use a hot air pencil (set to 235–245°C for SAC305) with a nozzle sized to the component (e.g., 3mm nozzle for a 3mm×3mm DFN) to reheat the solder joint. Apply gentle heat for 10–15 seconds to remelt the solder.
- Release Trapped Gas: Use a small needle (0.1mm diameter) to gently pierce the solder joint (avoiding component terminals or PCB traces) to release trapped gas.
- Refill with Solder: Apply a tiny amount of solder paste (Type 5 for small components) to the joint using a syringe. Reheat the joint for 5–10 seconds to melt the new paste and fill voids.
- Cool and Inspect: Allow the joint to cool to room temperature, then re-inspect with X-ray or microscopy to confirm voids are eliminated.
- Rework Documentation:
For regulated low-volume runs, document all void reworks:
- Record the component reference, void size, rework method, and post-rework inspection results.
- Attach X-ray/acoustic images of the void before and after rework to audit trails—critical for compliance with IPC-A-610 and ISO 13485.
7. FAQ: Void Prevention in Low-Volume Bottom-Terminal Soldering
1. What is the maximum acceptable void size for bottom-terminal soldering in low-volume PCB assembly, per IPC-A-610?
IPC-A-610 defines void limits based on component type and application class—these apply to low volume PCB assembly:
- Class 1 (General Electronics, e.g., toys):
- Non-thermal pads: ≤30% of joint area (single void) or ≤40% total (multiple voids).
- Thermal pads: ≤40% of joint area (no restriction on multiple voids).
- **Class 2(Commercial Electronics, e.g., IoT sensors)**:
- Non-thermal pads: ≤25% of joint area (single void) or ≤35% total (multiple voids).
- Thermal pads: ≤30% of joint area (total voids) – no single void >20% of pad area (to maintain thermal conductivity).
- Class 3 (High-Reliability Electronics, e.g., medical devices, automotive):
- Non-thermal pads: ≤15% of joint area (single void) or ≤20% total (multiple voids).
- Thermal pads: ≤20% of joint area (total voids) – single voids >10% require rework (to prevent overheating).
For example, a low volume PCB assembly run of automotive sensors (Class 3) with a 4mm×4mm QFN thermal pad allows total voids of ≤3.2mm² (20% of 16mm² pad area), with no single void exceeding 1.6mm² (10%). ShwayPCB’s Small-Batch PCBA Services (Low-Volume SMT Assembly) uses X-ray measurement to ensure compliance with these limits for all regulated runs.2. How to prevent voids when soldering ultra-small bottom-terminal components (e.g., 0201 bottom-terminated resistors) in low-volume PCB assembly?
Ultra-small bottom-terminal components (pad size ≤0.3mm×0.3mm) are prone to voids due to their tiny pad area—use these specialized tactics:- Solder Paste Selection:
- Use Type 5 or Type 6 solder paste (particle size 5–25μm) – smaller particles fill tiny pad gaps without trapping air. Avoid Type 4 paste (20–38μm particles), which may clog small stencil apertures.
- Choose "no-clean" flux with ultra-low outgassing (<3% per J-STD-004) – reduces vapor formation in limited pad space.
- Stencil Aperture Design:
- Use apertures that are 90% of pad size (e.g., 0.27mm×0.27mm for a 0.3mm×0.3mm pad) – slightly larger than standard to ensure sufficient paste without overflow.
- Add a single 0.05mm-diameter vent hole to the aperture – provides a minimal flux escape path without compromising paste volume.
- Placement and Reflow:
- Use a high-precision placement tool (e.g., manual vacuum pen with 0.1mm tip) to center the component on the pad – misalignment >0.02mm creates gaps that form voids.
- Reduce reflow peak temperature to 230–235°C (vs. 235–240°C for larger components) – prevents excessive flux outgassing in small pad areas.
These steps reduce void rates for ultra-small bottom-terminal components from 40% to <10% in low-volume runs.3. Can manual solder paste application (instead of stenciling) be used for low-volume bottom-terminal soldering without increasing voids?
Manual application is feasible for ultra-low runs (<20 units) but requires strict control to avoid voids:- Application Tool Selection:
- Use a syringe with a 0.1–0.2mm needle (e.g., EFD Ultra Precision Syringes) to deposit precise paste volumes. Avoid squeeze tubes, which dispense uneven amounts.
- Calibrate the syringe to deposit 0.001–0.002mm³ of paste per 0.1mm×0.1mm pad area – use a digital scale to verify volume (1mg of SAC305 paste ≈ 0.45mm³).
- Application Technique:
- Apply paste in a "dot" pattern (not a continuous line) on thermal pads – 3–4 small dots (0.05mm diameter) allow flux to escape, reducing voids.
- For edge terminals, apply a thin line of paste (0.05mm width) along the pad edge – avoids excess paste that traps flux.
- Post-Application Inspection:
- Use a digital microscope (100x magnification) to check paste volume – remove excess paste with a lint-free swab dampened with IPA, or add small amounts if volume is insufficient.
Manual application is not recommended for runs >20 units or components with <0.3mm pad sizes—stenciling provides better consistency and lower void rates.4. What is the cost of equipment needed to inspect voids in low-volume bottom-terminal soldering, and are there budget-friendly options?
Void inspection equipment costs vary by precision—budget-friendly options exist for low volume PCB assembly teams:- Entry-Level Options (\(200–\)1,000):
- Digital microscopes (50–200x magnification, e.g., AmScope SM-4TZ) – suitable for visual inspection of surface voids on edge terminals. Pair with a USB camera for image capture and basic measurement.
- Portable X-ray scanners (e.g., Unicomp X50) – cost \(800–\)1,000, provide 50–100x magnification for hidden voids in small QFNs (≤5mm×5mm).
- Mid-Range Options (\(5,000–\)20,000):
- Benchtop X-ray systems (e.g., Nikon Metrology XTH 160) – offer 200–500x magnification, automated void measurement, and 2D/3D imaging. Ideal for teams handling 50+ low-volume runs per year.
- Budget-Friendly Alternatives:
- Outsource inspection to third-party labs (cost \(50–\)200 per batch) – suitable for teams with <10 runs per year. Labs provide detailed X-ray reports and void size measurements.
- Cross-sectional analysis kits (e.g., Struers Discotom-100) – cost \(1,500–\)3,000, allow manual sectioning of 1–2 PCBs per batch to inspect internal voids.
ShwayPCB recommends entry-level digital microscopes + occasional third-party X-ray for small teams, and mid-range X-ray systems for high-volume low-run facilities.5. Why do voids reoccur in recurring low-volume bottom-terminal soldering runs, and how to resolve this?
Recurring voids often stem from unaddressed process drift—resolve with these steps:- Paste Batch Testing:
- Test new paste batches on 2–3 test PCBs before full production. Voids may increase if paste flux degrades (e.g., expired paste) or particle size changes (e.g., Type 5 vs. Type 4).
- Stencil Wear Check:
- Inspect stencil apertures monthly for wear (e.g., enlargement, burrs) using a digital caliper. Replace stencils if aperture size deviates by >5% (e.g., a 0.3mm aperture expands to 0.315mm).
- Reflow Oven Calibration:
- Calibrate oven temperature zones quarterly using a thermal profiler (e.g., KIC Start 2). Zone drift (e.g., 10°C variation) causes uneven heating and flux trapping.
- Operator Training:
- Retrain staff on paste application and component placement – human error (e.g., uneven paste dispense, misalignment) accounts for 30% of recurring voids. Use video tutorials to standardize techniques.
8. Conclusion
For low volume PCB assembly teams, avoiding voids in bottom-terminal soldering requires a meticulous blend of material science, process optimization, and inspection rigor. The unique challenges of small-batch production—frequent component changes, manual handling, and limited process tuning—demand targeted solutions: selecting low-outgassing solder paste, designing split stencil apertures for flux escape, optimizing reflow profiles for thermal mass, and implementing rigorous pre-treatment. By integrating these strategies, low volume PCB assembly stakeholders can achieve a >97% void-free rate, reduce rework costs by 70–80%, and ensure compliance with critical standards like IPC-A-610 Class 3.ShwayPCB’s Small-Batch PCBA Services (Low-Volume SMT Assembly) has validated these practices through hundreds of low-volume client projects:- For a 200-unit automotive sensor run (Class 3), our split stencil apertures (for 4mm×4mm QFN thermal pads) and optimized reflow profile reduced voids from 28% to 12%—meeting IATF 16949 requirements and passing thermal cycling tests.
- For a startup’s 50-unit IoT prototype run with 0201 bottom-terminated resistors, our Type 6 paste and precision manual application achieved a 96% void-free rate—enabling the client to meet their product launch timeline.
- For a 100-unit medical device run (ISO 13485), our X-ray inspection and rework process ensured all voids were <15% of joint area—passing a FDA audit with zero findings related to bottom-terminal soldering.
Whether you’re soldering ultra-small components, managing recurring voids, or optimizing inspection costs, ShwayPCB’s team of bottom-terminal soldering specialists is here to help. We offer free paste selection guidance, stencil design consultations, and void inspection training to ensure your low-volume runs meet the highest quality standards.To discuss your low volume PCB assembly bottom-terminal soldering challenges, request a free void prevention assessment for your upcoming run, or learn how we resolved similar issues for a client in your industry, contact ShwayPCB at yuan@shwaypcb.com. Our technical team will work with you to design a void-free solution that fits your low-volume needs, budget, and quality requirements.
Copyright © 2005-2025 ShwayPCB : PCB Fabrication and Assembly Manufacturer. All Rights Reserved. POWERED BY UEESHOP
Copyright © 2005-2025 ShwayPCB : PCB Fabrication and Assembly Manufacturer. All Rights Reserved. POWERED BY UEESHOP